Altera_Forum
Honored Contributor
10 years agoQuartus Prime Lite IP Cores compiling
Hi, My name is Eloy Navarro, and I have a doubt about compiling with Quartus Prime.
The fact is that I was used to Ciclone III family with Quartus 10.1, having no problems to compile and program IP Cores with time limitation. Now I have moved to Cyclone V and I'm unable to compile a project with IP Cores (FFT is the one I'm trying). I am working with Quartus 15.1 Lite Edition and a BeMicro CV A9 as target board. The user guide (ug_fft.pfd) tolds to manually add .qsys .qip and .sip. Once attached, the compilation exits with errors ("can't generate netlist output files because "..." is an OpenCore Plus time-limited file." and "can't generate netlist output files because the encrypted file "..." is not available.") I have not added anything else. I don't know if these errors are related with something missing, licensing, libraries or maybe I'm doing all wrong in this new Quartus. Thanks in advance and Best regards, Eloy