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mappy5's avatar
mappy5
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4 years ago

Quartus prim SE memory Error

I'm trying to synthesize a Verilog into Cyclone V. However, compilation does not proceed in 11% of Analysis & Synthesis. An error message will be displayed when the synth size is 11% and the maxi...
sstrell's avatar
sstrell
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4 years ago

What version of Quartus? Can you post the exact error message(s)? Are you using any unique IP or features in the design?

  • mappy5's avatar
    mappy5
    Icon for New Contributor rankNew Contributor
    4 years ago

    hi,sstrell

    Quartus: Quartus Prime SE 20.1.1 Build 720

    Error Message :
    Error (293007): Current module quartus_map ended unexpectedly. Verify that you have sufficient memory available to compile your design. You can view disk space and physical RAM requirements on the System and Software Requirements page of the Intel FPGA website (http://dl.altera.com/requirements/).

    only software cpu core IP and Normal compilation.

    machine memory : 134GB
    disk space : 2TB available