Quartus II waveform editor always shows output as Forcing Unknown

I am using altera tutorial (Simulation of Verilog Designs) example in quartus II (ver9) and I always get output as 'Forcing Unknown'. I even tried out other verilog code examples also will get Forcing Unknown output (X) only.

Anyone know what's wrong? I suspected some setting problem but I do not know where to edit or check out. Please help.