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Altera_Forum's avatar
Altera_Forum
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12 years ago

Quartus II - compile problem?

When I analyze and synthesis my Quartus project, I receive the following message

*** Fatal Error: Uncaught C++ Exception

Module: quartus_map.exe

Lock in use: 9

Stack Trace:

0x9616: RaiseException + 0x53 (KERNELBASE)

0x5df5f: _CxxThrowException + 0x47 (MSVCR90)

0x179b: operator_new + 0x3b (tbbmalloc_proxy)

0x2979: mem_new_array_wrapper + 0x49 (ccl_mem)

0x13b2: rml::internal::ThreadId::own + 0x12 (tbbmalloc)

0x1006: mem_native_array_delete + 0x6 (ccl_mem_native)

End-trace

Quartus II 32-bit Version 12.0 Build 178 05/31/2012 SJ Web Edition

I also searched on the forum, but there is no suitable answer for this case. Is there anybody who has met this problem? If yes, please tell me the cause and the solution.

10 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    First of all, I would close Quartus and then delete the folders "db" and "incremental_db". Sometimes this "method" works for strange Errors or behaviours within Quartus.

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    Thank you for your reply!

    I have tried as you said for several times, however this error also appears again.

    According to the Altera website, a problem " Fatal Error: Uncaught C++ Exception Module: quartus_fit.exe" comes from the memory of the computer running the Quartus. I doubt that my problem is the same.
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    --- Quote Start ---

    Workaround / Fix

    To avoid this error, ensure your computer has enough memory to compile your design based on the guidelines in the Device Support Release Notes.

    --- Quote End ---

    Are you sure you have enough memory for the design? How much RAM and free space (hard disc) do you?

    What kind of an Fpga family is it?
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    It indeed looks like a lack of memory on your computer. The new C++ operator can't raise a lot of different exceptions.

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    @vhdl_world,

    I am sure that the free space is sufficient. However, my computer just has 2G RAM (I don't know it is sufficient or not), an FPGA DE2-board: with the family of Cyclone II.

    @Daixiwen,

    I also thought so. Maybe the cause comes from memory. When I comment some sections of my design, the Quartus compile successfully. It can be evidence that the memory of my computer is not sufficient to compile.

    If you can guess any cause of the problem, please tell me. Thank you for all your reply!
  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    I reviewed my code and saw that there were several sections like the example you mentioned. It can be the main cause for the Quartus software not be able to compile successfully. I am trying solving that problem. Thank you very much for your reply!

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    We have a similar problem in subscription Version (same release). Did you found a soloution?

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    My cause is mentioned by Daixiwen (big loops generating some hardware at each iteration). I solve it by doing my function in each clock. For example, I want to do my function 1000 times. Instead of waiting for 1000 clocks and then using "for" loop to do my function (in one clock, 1000 functions are done), I do my function in each clock and count until 1000 clock to stop it (in one clock, 1 function is done, do it for 1000 clocks).

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    Soloution for us was to upgrade to Win7 so that we are able now to use 8 GB RAM on host. That we needed more than 4 GB RAM to compile our project was visible in flow report.