Quartus graphical toplevel(bdf) no error for missing source signal

Most designs do not have hundreds of unused inputs. Even if you set these I/O as ports in your top-level HDL, the Fitter will select temporary I/O pins to prevent logic from being optimized away.

If you really need to preserve all of those inputs and you have a list of them, you can easily copy and paste them into the To column in the Assignment Editor to create virtual pin assignments for each. And of course, you only need a single assignment for a bus using wildcards.