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Altera_Forum
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14 years ago

Quartus error while compiling a reference design

When compiling the reference design "Interfacing a 267-MHz DDR2 SDRAM with an Arria II GX FPGA" with Quartus 10.1sp1 on CentOS 4.6, I get the following error message. It says the error is in a tcl fi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Hi,

My guess is that the reference design has QSF timing assignments (for the Classic Timing Analyzer), and the V10.1sp1 TimeQuest is having trouble trying to convert them to an SDC file.

I would recommend one of the following three options:

1.- Remove the Timing assignments from the QSF and manually create an SDC file for TimeQuest

2.- Use V9.1 to compile and run quartus_sta --qsf2sdc to generate the SDC file. Then remove the timing assignments from the QSF, and try again with V10.1sp1 (and using the generated SDC file).

3.- Just try to use the V10.1sp1 reference design. Any reason why you are using the V9.1 one?