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Altera_Forum's avatar
Altera_Forum
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10 years ago

Quartus does not support the module IO were defined as real or user defining ?

for example: ENTITY interpolation_filter IS PORT( clk : IN std_logic; clk_enable : IN std_logic; reset ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

thanks for reply! it seems user defining type also will report error. please see the picture. this filter program was produced by the Matlab, so I can not make sure if the VHDL or Quartus does not support 'real' type in the module IO definition? br njjjl