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Altera_Forum
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10 years ago

Quartus complaint: My LOOP is too big? But the code is from the book, what's wrong?

Hello friends. I'm trying to make addition and subtraction of floating point. My guide is a book "Computer Arithmetic and Verilog HDL Fundamentals" by Cavanagh. Inside the module he use a code for al...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

I don't think that you need a DSP or other processor to perform the calculation. You can also write HDL code that processes data sequentially, using block RAM to hold the array elements. You have to set up a state machine that controls the calculation flow.

I presume that the parallel cores idea doesn't fit any FPGA hardware available to you.