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Honored Contributor
Honored ContributorQuartus complaint: My LOOP is too big? But the code is from the book, what's wrong?
Hello friends. I'm trying to make addition and subtraction of floating point. My guide is a book "Computer Arithmetic and Verilog HDL Fundamentals" by Cavanagh. Inside the module he use a code for al...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- I think in this case is mandatory to use floating point, I need iterative divisions, divisions will bring up fractional numbers of different sizes, example. 2.9 - 2.1899, it is necessary to align exponents before make any operations, thus is necessary exponents to vary according to the input size difference, and this is exactly what floating point is about. --- Quote End --- In that case - stick with the altera floating point IP cores rather than trying to write your own floating point arithmatic. This is of course, if there is no chance you can redesign the algorhith to fit with an FPGA. If you want lots of floating point (and especially division - which is particularly expensive in FPGA) why not use a DSP?
