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James_B's avatar
James_B
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4 years ago

Quartus allows redundant overloaded functions in VHDL without a compiler error ??

I have a question on why does Quartus allow redundant overloaded functions to be compiled without raising an error condition. An example overloaded illegal redeclaration in a VHDL package is shown...
James_B's avatar
James_B
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4 years ago

Nurina,

I am wondering if you had a chance to run the example design that I posted on GitHub of the overloaded VHDL example.

If there is something additional that you would like to see please let me know.

Thanks. James