Quartus 2 7.0 download

Re: Your comment "also i tried doing the same file in 7.2 and it gave an error, i made the exact same file, in the morning and it was fine in the lab, i changed the way the pins were named from A[3..0] to A3,A2,A1,A0 and it worked, so i want quartus 2 7.0 because it seems to be better than 7.2".

I guess you are using schematic? Version 7.2 has started doing something more standard with bus naming (to match the standard for VHDL & Verilog etc). If your lab relied on the old MAX+PLUS II way of doing schematic bus naming (like 7.1 and lower), you might see some differences... There's an option to change the behavior back to the old way. I found it in the Help - search for "Instance Naming Rules for Pin Names in the Block Editor".