kikoss
Occasional Contributor
1 year agoQuartus : error in compilation
Hello I receive the following error in compilation : Error(16812): Verilog HDL error at safety_top_level.sv(178): port connections cannot be mixed ordered and named. Or there might be a trailing ...
- 1 year ago
You don't say which line is line 178, but you're missing a dot in front of rx_in_p.