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I was hired as a consultant to help get a company out of this kind of mess (in 11.1). They were using component editor to create their own components. Finally, since all confidence was lost in this tool, and given the statement by one of their gurus that component editor was meant to just get the user started, I decided to isolate the design from the Qsys environment by adding a bridge to export the avalon bus signals. This way the user components simply hook up to the inteface outside of Qsys. You can put a separate bridge for each user component to keep things nice. The only issue is you have to add the base addresses to your C code since it won't be done by qsys.
Good luck.
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Interesting but it will be followed by a tidy work aligning data/address of your custom component with your bus. It might be feasible for Memory Mapped connection but it is certainly tricky for Avalon-ST connections. Giving that timing adapters are "freely" provided by Qsys.
Qsys is a good tool in general (one should not focus with only one aspect that failed), not yet mature and I am sure it will be better in newer versions of Altera design tools.
I managed to incorporate a custom JPEG encoder in a Qsys subsystem. I created the (_hw.tcl) file with SOPC builder. Then I added the folder that has the RTL and TCL files under the subsystem path. Qsys recognized the tcl file and displays the component in the top left among other components. I tested it and it worked.
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