Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Qsys mm_interconnect - how to control size

I've got a largeish QSYS system with HPS and VIP suite modules, some dual-port RAM, etc. I've got a JTAG-MM Master hooked up to the control ports of the VIP modules, and I've got the HPS LW_AXI hook...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Turns out it is in the Quartus Handbook, not an appnote - see the section "Creating Dedicated Master and Slave Connections to Minimize Interconnect Logic" in Chapter 8 Optimizing Qsys System Performance of https://www.altera.com/en_us/pdfs/literature/hb/qts/qts-qps-5v1.pdf

The entire chapter is worth a read if you're spending any time with Qsys.