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Honored Contributor
Honored ContributorQsys error : has write interface but no write control
Hi , I am trying to create a new component on Qsys , using my verilog code. The problem is that after I select the interfaces and the kind of signals , an error :"Has written interfaces but not write...
Altera_ForumHonored Contributor
Honored ContributorThank you for your reply, I am new with Altera FPGA`s and I am a bit confused...I read something about avalon conduit interface, you are suggesting me that conduits can be used in my system in place of avalon memory mapped interafaces?
