Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

QII 8.0SP1 gives Error 10028 with SystemVerilog using modport

Hi All, I am trying to synthesize several SystemVerilog modules that declare interfaces and then use them to connect to each other. One interface module shows Error 10028 : Can't resolve m...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

It's more to do with the way QIS models modports during synthesis. You could call it a bug, but it's certainly not a behavior demanded by the standard. I suggest trying Quartus II 8.1 when it comes out in another month or so.