Forum Discussion
AGofs
Occasional Contributor
6 years agoPrograming .jic file into ISSI IS128LP128 flash memory and connection between Flash memory and FPGA.
I'm using Quartus-II Rev. 18.1 in order to program .jic file into ISSI IS128LP128 flash memory at active serial mode, but without success. 1). How should I connect IS128LP128 (8-pins) to Cyclone-V...
ShafiqY_Intel
Frequent Contributor
6 years agoHi AGofs,
You may refer to this solution here:
https://forums.intel.com/s/feed/0D50P00004ImOLLSA3
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CBATT (Customer)
a month ago
Hi,
I believe that this problem may be solved. If not, here on how we manage to get this memory to work with Quartus 19.1 for write, erase and FPGA initialization.
- Open Programmer
- Go to File > Convert Programming File
- Programming file type, select .jic
- Open configuration device using "..."
- Select your device family
- Create a <<new device>>
- Configure according to your memory datasheet
- e.g., name: IS25LP128, ID: 17, Density: 128Mb, Single dummy: 8, Quad dummy: 6
- Select Micron as Flow template
- Change Addressing mode(byte) from each flow tab from 4 to 3
- In initialization tab:
- Remove everything except Read ID (Command 0x9F), Write Enable (Command 0x06) and Write status register (Command 0x01), keep this flow order
- Note that you need a Write Enable before sending other commands, check your memory datasheet for more info
- In erase tab:
- Change Read flag status register to Read status register
- Change Command to 0x05 (ISSI memory uses the READ STATUS REGISTER OPERATION for erase status)
- Change Expected data to 0x00
- Change Expected data mask to 0x01
I hope this helps.
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