Forum Discussion
Altera_Forum
Honored Contributor
15 years ago --- Quote Start --- Its a simple problem, and not a problem with the code. Your A and B inputs (numerator/denominator) are 0, so it tries to calculate 0/0 which is undefined. As soon as B changes to non-zero, the output is valid. If you initilise B to something non-zero, there is no problem. --- Quote End --- Thank you very much. By the way, I have one more question: In module sin_cos I used one adder
adder1: lpm_add_sub
generic map(lpm_width=>16,LPM_REPRESENTATION=>"SIGNED",lpm_pipeline=>1)
port map(dataa=>adda,datab=>addb,clock=> clk,result=>addr); When I calculate the value, I see signal Cin (the signal of lpm adder) alway is "Z". and when I see the declaration of file 220model.vhd I saw the value Cin initial to "Z" (attachment) port (
dataa : in std_logic_vector(lpm_width-1 downto 0);
datab : in std_logic_vector(lpm_width-1 downto 0);
cin : in std_logic := 'Z';
add_sub : in std_logic := '1';
clock : in std_logic := '0';
aclr : in std_logic := '0';
clken : in std_logic := '1';
result : out std_logic_vector(lpm_width-1 downto 0);
cout : out std_logic;
overflow : out std_logic
); If this value alway is "Z", is the result of adder wrong?