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Altera_Forum's avatar
Altera_Forum
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15 years ago

problem with value 'X' in VHDL

Dear my best friends I used vhdl to calculate SVPWM algorithm. I used LPM library for divider. I'd already initial value for all of signal, but It still has "X" value. This is LPM library m0...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

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That is wrong

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I would say "this is not always true".

However, even if in a single process (and from the above snipset we don't know if this is the case, but we KNOW that the simulation shows a problem)

it is a bad practice to assign a signal in that way.

What kind of circuit is that?

It assigns to A the value TTA when T_sum<=x410,

further, it assigns to A the value of TTB in the same condition.

I assume that, if in a single process, there must be another if/case statements that selects between the two. This is too complex IMHO.