Problem with SignalTap in QuartusII v 13.0sp1 and device EP1S40F780C7

Question

I have all the time this error:Error (261009): Cannot run SignalTap II Logic Analyzer. SignalTap II File is not compatible with the file programmed in your device. The expected compatibility checksum value is 0x2DB51B6F; the value read from your device is 0x9EDA8DBF I was checking on the forum different problems and I try all that I read and the error persist:-Remove the DB folder/output files/ incremental compilation-Remove the .stp file and regenerateI have also found another strange behavior, when in the top level I coment some models then it works perfecly, but if not give me the same error of the checksum.I have to say that the design hasn't any critical warning or warnings about the design rules...Someone have experience with this problem?.

vicky1 · Answer

Hi,Can you please check the below solution note &amp; let me know how it works in this case,https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base/tools/2018/error-261009---cannot-run-signal-tap-logic-analyzer--signal-tap-.htmlBest Regards,Vikas Jathar

aaria3 · Answer

Hi,I already read this information and I use always the basic AND trigger in the SignalTap.And there is a strange behavior because in my top level FPGA if I add some entities I get the error, but with others not.Best Regards,Alen.

Forum Discussion

Problem with SignalTap in QuartusII v 13.0sp1 and device EP1S40F780C7

2 Replies

Recent Discussions

Perpetual license Quartus II doesn't allow to build Cyclone V devices anymore.

Quartus Eda_Writer keeps crashing

Failing IO buffer

Floating point operation on Cyclone 10 GX

Quartus/Signaltap complains about wrong version