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Altera_Forum's avatar
Altera_Forum
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13 years ago

Problem with Qsys when creating PIO

I am beginning to create a hardware with Qsys. The system that I want to create has 4 ports: clk(input), reset(input), a1(input), a2(output). I added a nios processor, a on-chip memory, a jtag u...
Altera_Forum's avatar
Altera_Forum
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10 years ago

Double click the 'external connection' and you should get a name you can edit. Put a suitable name here, then generate, and you will have the relevant signals as ports on the QSYS system.