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Altera_Forum's avatar
Altera_Forum
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12 years ago

Problem with asynchronous FSM - VHDL

I have a problem with implementation of finite state machine, which is responsible for detection of motor direction based on signals from HALL sensors. The system has three inputs (HALL1, HALL2, HALL...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Have you checked the netlists to see if the logic it has created is as you expected?

You didnt show your testbench.