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Altera_Forum
Honored Contributor
Honored ContributorProblem with accessing the DE1 board SRAM
I am having trouble reading the SRAM on the DE1 board :(. Below are the code used to access the SRAM. My objective is to write data to an address once and read that particular address more than once....
Altera_ForumHonored Contributor
Honored ContributorI am not familiar with the SRAM, but I found this example: http://pentevo.googlecode.com/svn/fpga/tests/test_dram/sram_control.v
There the SRAM is controlled with a three cycle write. Might it be that you require the same?
