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Altera_Forum's avatar
Altera_Forum
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15 years ago

Problem witch implementing big automaton

Hi! I have serious problem with implementing big automaton in VHDL (it has about 77250 states). When i try complie project in Quartus, everytime i get an error "Out of memory in module quartus_map...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Let us implement manually the FSM in a counter that runs from 0 to 77250-1. A counter this size is no problem but the extra logic is phenomenal 


signal count : integer range 0 to 77250 := 0;
 
--put defaults here
case count is
       when => 0  
            all your actions...
 
        when 1 => 
            all your actions....
 
        when 77250-1 =>
            all your actions

I still find it hard to write 77250 cases... surely you need extra tool to automate the code e.g. C or Matlab m file