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Altera_Forum
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13 years ago

Problem! Binary Divisor: Error (10028): Can't resolve multiple constant drivers

Hi! I'm trying to make a binary divisor of 4 bits in VHDL. The process i'm using to get the quotient is to compare and substract. So, what I want to do is to subtract certain binary number wi...
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Altera_Forum
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13 years ago

Of course. That algorithm is controlled by state machine so you need a clock.

What tricky says is correct. If you forget signals from sensivity list ( all the signals that are inputs to the process ), the code will be synthetized anyway. But the simulation show inferred latches, because the ommited signals.

Why do you make a substraction with a component? If you define a vector as unsigned you can do simply:

c <= a - b;