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Altera_Forum
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13 years ago

Preventing a PLL instance from being optimized away

I have a design that uses two PLLs that drive separate clock output pins. Because the PLLs are identical and are driven from the same input clock, Quartus II is optimizing away one of the PLLs. I hav...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

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Found a fix for this:

Assignments->Settings->Fitter Settings->More Settings->Auto Merge PLLs

It's on by default, which seems wrong since it's an optimization with side effects.

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Can't find this option (Auto Merge PLLs) on specified way. My Quartus software version is 13.1. Could you tell me your software version?