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Honored Contributor
Honored ContributorPrevent instantiation of clock driver
Hi all, to debug a design I have routed several clock signals to FPGA output pins (so that I can measure them). As a consequence, the compilation failed, because the fitter could not place one ...
Altera_ForumHonored Contributor
Honored ContributorPLL's can only drive globals. There is physically no way to have them use local routing. Something else will need to be demoted.
