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Altera_Forum's avatar
Altera_Forum
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9 years ago

Prevent instantiation of clock driver

Hi all, to debug a design I have routed several clock signals to FPGA output pins (so that I can measure them). As a consequence, the compilation failed, because the fitter could not place one ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

PLL's can only drive globals. There is physically no way to have them use local routing. Something else will need to be demoted.