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Altera_Forum
Honored Contributor
9 years agoPLL Simulation not working fine
Hello, I am using Quartus Prime 17.0 version. In that when I am using PLL IP for clock generation, then during simulation I am not getting continuous clock at the output rather getting continous c...
Altera_Forum
Honored Contributor
8 years agoCheck the timescale you are using and frequency for input reference clock of PLL..
Share a screenshot of Waveform..