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Altera_Forum's avatar
Altera_Forum
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14 years ago

PLL, Reconfigure, Qsys, Quartus 11.1, Stratix IV

Trying to instantiate a PLL and reconfiguration in Qsys.

Device is Stratix IV.

Using Quartus 11.1.

From Qsys, tried Avalon ALTPLL, Altera PLL Reconfig.

Doesn't work, with errors shown below (during generation).

Other observations that might help.

- ALTPLL and ALTPLL RECONFIG seem to be available in Quartus megawizard.

And in fact I got pll + reconfig to work in simulation, Stratix IV, Quartus only.

- Altera PLL in Qsys only seems to want Stratix V.

- Generally, there seems to be some disconnect between the Megawizard in Quartus

and the available library items in Qsys.

Error when generating Avalon ALTPLL in Qsys:

Info: altpll_0: Error while generating PLL_playground_altpll_0.v : 1 : Illegal port or parameter name scandone

Illegal port or parameter name scanclk

Illegal port or parameter name scanclkena

Illegal port or parameter name scandataout

Illegal port or parameter name configupdate

Illegal port or parameter name scandata

child process exited abnormally

Info: altpll_0: Illegal port or parameter name scandone

Illegal port or parameter name scanclk

Illegal port or parameter name scanclkena

Illegal port or parameter name scandataout

Illegal port or parameter name configupdate

Illegal port or parameter name scandata

child process exited abnormally

while executing

"exec clearbox altpll_avalon device_family=STRATIXIV CBX_FILE=PLL_playground_altpll_0.v -f cbxcmdln_1326246500574197"

("eval" body line 1)

invoked from within

"eval exec $cbx_cmd "

Error: Can't continue processing -- expected file C:/Users/aschultz/AppData/Local/Temp/alt5350_5156334380085942516.dir/0006_sopcgen/PLL_playground_altpll_0.v is missing

Warning: Quartus II 32-bit Generate HDL Interface was unsuccessful. 1 error, 0 warnings

Error: Peak virtual memory: 273 megabytes

Error: Processing ended: Tue Jan 10 17:48:21 2012

Error: Elapsed time: 00:00:00

Error: Total CPU time (on all processors): 00:00:01

Error: altpll_0: File C:/Users/aschultz/AppData/Local/Temp/alt5350_5156334380085942516.dir/0006_sopcgen/PLL_playground_altpll_0.v written by generation callback did not contain a module called PLL_playground_altpll_0

Info: altpll_0: "PLL_playground_inst" instantiated altpll "altpll_0"

Error: Generation stopped, 1 or more modules remaining

Info: PLL_playground_tb: Done PLL_playground_tb" with 9 modules, 21 files, 189442 bytes

Error: ip-generate failed with exit code 1: 7 Errors, 2 Warnings

Error: There were errors creating the testbench system.

Info: Finished: Create testbench Qsys system

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    that rings a bell, i can't remember if i saw it myself or if it's on the forum somewhere. have you searched?

  • Altera_Forum's avatar
    Altera_Forum
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    Thanks.

    Yeah, I've searched the usual suspects

    Altera site

    wiki

    this forum

    (by the way, I can't figure out how to search this forum, forcing all of the keywords

    to be matched)
  • Altera_Forum's avatar
    Altera_Forum
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    in Qsys 11.1sp1 i added an Avalon ALTPLL, connected the inputs to clk_0, set all the outputs to conduits, and was able to generate the system

    i took the first command from your log that looks like it throws up:

    C:\temp>clearbox altpll_avalon device_family=STRATIXIV CBX_FILE=PLL_playground_a

    ltpll_0.v -f cbxcmdln_1326246500574197

    Error in generator - aborting

    ERROR : MGL_INTERNAL_ERROR: Illegal module name UNUSED. Module name UNUSED is no

    t a submodule of altpll_avalon

    ERROR : The width_clock of 6 specified is not supported in STRATIXIV

    can you delete the Avalon_ALTPLL and reinstantiate it?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Concerning searching, what I'm wondering is how

    within the Altera forum to search, such that all keywords are used.

    Like, search for

    wallace gromit

    such that the search requires hits of both wallace and gromit.

    (I'll look into the other response about PLL shortly)