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Altera_Forum
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14 years ago

pll output frequency

I am getting 6.25khz clock output from a 40mhz clock input after pll(cyclone4-150) I shoud be getting 40mhz. 1-What can be gone wrong? 2-To debug I just want to connect an output directly ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Very low output frequency of PLL may be observed if no input clock is conncted.

You can post a Quartus archive of your design.