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SOkte
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7 years ago

Platform Designer Tutorial Address range Error

I am following the guide AN 812: Platform Designer System Design Tutorial, I received the below error. Error: sysA.cpu.data_master: pipeline_bridge.s0 (0x0..0xffff) is outside the master's address ...
SOkte's avatar
SOkte
Icon for New Contributor rankNew Contributor
7 years ago

I have attached the address width of the CPU

In the edit assignments menu it is 17 bit wide, in the ​signals interfaces menu it is 12 bits wide