Nitin1
New Contributor
4 years agoPlatform Designer Error
I am getting this error when trying to Generate files using Quartus Standatd Edition version
Error: add_fileset_file: No such file C:/Users/nmistry/AppData/Local/Temp/alt8839_8898266765451528108.dir/0006_cpu_gen/simgen_tmp_0
while executing
"add_fileset_file "$file_name" OTHER PATH "$my_file""
(procedure "sub_add_generated_files" line 51)
invoked from within
"sub_add_generated_files "$NAME" "$output_directory" "$rtl_ext" "$simgen" "$plainTEXTfound""
(procedure "generate_with_plaintext" line 6)
invoked from within
"generate_with_plaintext "$NAME" "$rtl_ext" "$simgen""
(procedure "sub_sim_verilog" line 5)
invoked from within
"sub_sim_verilog niosii_system_nios2_cpu"
This error only started today and was not occuring before with this design