Occasional Contributor
Super ContributorYes .qip is an output file. You would not list it there.
On the Files tab of Component Editor, add all the files that make up the component. In the attributes column and below the files list, make sure the top-level entity of the design is defined. Then just click the button to analyze the files. Think of it as a mini project. You have to have a top-level entity and all instantiations and connections must be correct.
Can you post the actual error messages you are getting? Perhaps you have an incorrect instantiation somewhere.
Occasional ContributorHi thanks for answering.
I understand what you mean, I made sure to correctly set the top_level entity in Component Editor.
As for instantiation, the only guarantee I have about its correctness is that I am able to compile and simulate the module.
I am getting this kind of error:
Error: VHDL Use Clause error at helper_pkg.vhd(45): design library "common_types" does not contain primary unit "common_types" File: <PATH>/helper_pkg.vhd Line: 45
Said line 45: "use common_types.common_types.all;"
(I changed the name of the files and library to be on the safe side with my company; I apologize for the inconvenience)
This is the first out of all the errors of the same kind. There are many such errors, but I think there is one for each instance of a sub-module/reference to a package.
On the other hand, I found a way to get my component to Platform Designer. I just copied and manually edited sections from another _hw.tcl file. I managed to compile the whole design by doing so. However, I'd still like to know the proper way.
