Forum Discussion
Altera_Forum
Honored Contributor
8 years ago --- Quote Start --- ... Is there anyway you can reduce the area usage of your kernel to get a proper estimation of the actual area utilization after placement and routing? e.g. by reducing unroll factor or SIMD size? After all, the estimation by aoc is generally not very accurate and I have seen differences up to 50%; though aoc pretty much always overestimates the area utilization for me. --- Quote End --- Although all my kernels are single threaded, I think it is important to mentioning the following: I had a kernel whose performance I couldnt improve further due to dependencies, so I dediced to duplicate, and then (if possible) triplicate it by creating other kernels with same functionality (minor difference in order to ensure overall synchronization). The duplicated version fits on the a10gx and its fitter summary is the following:
+--------------------------------------------------------------------------+
; Fitter Summary ;
+-----------------------------+--------------------------------------------+
; Fitter Status ; Successful - Wed Oct 4 20:51:46 2017 ;
; Quartus Prime Version ; 16.1.2 Build 203 01/18/2017 SJ Pro Edition ;
; Revision Name ; top ;
; Top-level Entity Name ; top ;
; Family ; Arria 10 ;
; Device ; 10AX115S2F45I1SG ;
; Timing Models ; Final ;
; Logic utilization (in ALMs) ; 192,778 / 427,200 ( 45 % ) ;
; Total registers ; 495991 ;
; Total pins ; 173 / 960 ( 18 % ) ;
; Total virtual pins ; 0 ;
; Total block memory bits ; 9,621,616 / 55,562,240 ( 17 % ) ;
; Total RAM Blocks ; 1,502 / 2,713 ( 55 % ) ;
; Total DSP Blocks ; 469 / 1,518 ( 31 % ) ;
; Total HSSI RX channels ; 8 / 72 ( 11 % ) ;
; Total HSSI TX channels ; 8 / 72 ( 11 % ) ;
; Total PLLs ; 78 / 144 ( 54 % ) ;
+-----------------------------+--------------------------------------------+
Then, I decided to triplicate it, and thats when I get the "placement cannot find a legal solution" error message. All logs attached previously correspond to this triplication-attempt. To compare, here is the (triplicate) fitter summary showing, as you mentioned, the strange 1% of logic utilization:
+--------------------------------------------------------------------------+
; Fitter Summary ;
+-----------------------------+--------------------------------------------+
; Fitter Status ; Failed - Tue Oct 10 21:21:23 2017 ;
; Quartus Prime Version ; 16.1.2 Build 203 01/18/2017 SJ Pro Edition ;
; Revision Name ; top ;
; Top-level Entity Name ; top ;
; Family ; Arria 10 ;
; Device ; 10AX115S2F45I1SG ;
; Timing Models ; Final ;
; Logic utilization (in ALMs) ; 136 / 427,200 ( < 1 % ) ;
; Total registers ; 685413 ;
; Total pins ; 173 / 960 ( 18 % ) ;
; Total virtual pins ; 0 ;
; Total block memory bits ; 12,651,216 / 55,562,240 ( 23 % ) ;
; Total RAM Blocks ; 134 / 2,713 ( 5 % ) ;
; Total DSP Blocks ; 696 / 1,518 ( 46 % ) ;
; Total HSSI RX channels ; 8 / 72 ( 11 % ) ;
; Total HSSI TX channels ; 8 / 72 ( 11 % ) ;
; Total PLLs ; 78 / 144 ( 54 % ) ;
+-----------------------------+--------------------------------------------+
Following a similar reasoning, then I think there might be an overutilization of RAM as well Does this help to get a better idea? thank you!