Forum Discussion
Altera_Forum
Honored Contributor
13 years agoWell interesting design. The only thing I notice is GND has widespread connections which either fooled TQ or fell with its definition of clock or it decided to connect to global clock network.
A work around would be do declare it as clock then set it to very low frequency - just a thought. However I am a bit lost now because I know TQ reports violations on setup/hold on clocked registers and only on paths between clocked registers. So far I didn't see those paths. Nevertheless you should get delay information.