Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

PIN Mapping Issue

Hello Friends, I am a starter in FPGAs and learning for starting a project of implementing a communication protocol in Cyclone V. I have the Deo-Nano-Soc development board from Terasic. Ok my q...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

One possibility is that Quartus decided to remove those pins because they didn't have any influence on the project. It can be because they aren't connected to anything in your project, or because of a design bug (for example because they are used in a process whose clock is never toggling).

After the synthesize step is finished, search for those pin names in Quartus' warnings. If it decided to remove them, it should tell it there.