Forum Discussion
nome
Occasional Contributor
5 years agoPFL configuration Arria ii GX
Hello I m Newbie
I am trying to configure EP2AGX Arria® II GX using EPM240 Max ii CPLD and on board CFI Flash js28f256m29ewh using PFL IP.
In my case our custom Board flash Address bus 24bit bus...
NurAiman_M_Intel
Super Contributor
5 years agoHi,
Thank you for contacting Intel community.
We would recommend you to refer to Intel FPGA PFL userguide below:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_pfl.pdf
Let us know if you have any concern.
Regards,
Aiman
nome
Occasional Contributor
5 years agoHi
Sir
Thanks for your reply
In my case I wrote my above post our custom board doesn't have directly CPLD to CFI data port there
thats why I am confused how to define PFL_flash_data [0] to PFL_flash_data[7] in PFL? CFI flash D15 also connected with CPLD.
PFL_flash_addr[0] to PFL_flash_addr[24] CPLD to CFI connected there
all require another pin connected between CPLD and CFI Flash like nce,we,oe etc
Thanks
Nome
- nome5 years ago
Occasional Contributor
Hello
i have found 10 more pins between cpld and fpga
i am totally confused
how configure PFL
as in ug_pfl. pdf i couldn't find out how configure if we don't have data bus between cfi and cpld
please help me
thank
nome