Forum Discussion
travisa
New Contributor
3 years agoHi,
Yes we tried compilation of the project (after IP up-gradation) with Quartus Prime Pro v18.0 as well as 21.4, and unfortunately getting same error. Also when I tried to compile the /Demonstrations/PCIe_Fundamental/DE5A_NET.qpf, gets same error (screenshot attached) as gotten while compiling /Demonstrations/PCIe_DDR4/DE5A_NET.qpf.
As I am beginner in Verilog also, could you please suggest the change I have to do in bit more detail. Thank you.