PCIe DMA transfer design code Compilation error.

Hi Travis,

I think you can safely ignore the warning.

For the Verilog error, it normally happens as in a Verilog Design File (.v) at the specified location, you specified a value for a module parameter that is not a constant expression; however, parameter values must be constant expressions. My suggestion is try to edit the design so the values you assign to parameters are constant expressions.

Besides that, do you try it on a different device or Quartus version (as you mention previously in v18.0 )

Is the same error still happening?

Regards,

Wincent_Intel