Forum Discussion
FCive
Occasional Contributor
7 years agoOpenCL error on code compilation
Dear all, I would like to use OpenCL SDK for a Terasic DE5-Net to deploy my algorithm (I am using Quartus 18.1 and OpenCL SDK 18.1). I successfully run the examples provided by Intel FPGA for OpenCL...
HRZ
Frequent Contributor
7 years agoI don't really see a race condition in your current code snippet and cannot think of any reason why it would generate incorrect output. One test you can do is to extract that part of the code and convert it to a separate kernel and do the rest of the computation on the host and see if the output is still incorrect. If it is, then you can go ahead and add a "lightweight" printf to your code and try to see if you can figure out where things are going wrong on the hardware.