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FCive's avatar
FCive
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

OpenCL error on code compilation

Dear all, I would like to use OpenCL SDK for a Terasic DE5-Net to deploy my algorithm (I am using Quartus 18.1 and OpenCL SDK 18.1). I successfully run the examples provided by Intel FPGA for OpenCL...
HRZ's avatar
HRZ
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

Please attach the quartus_sh_compile.log file from your compilation folder. How much memory does your compilation machine have? Also note that Terasic's latest BSP for the DE5-Net board targets Quartus v18.0; it is not guaranteed to work with 18.1.