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Altera_Forum
Honored Contributor
8 years ago --- Quote Start --- out_buf1(i) is a single bit. You need to make it into an array. something like: one_buf1 := one_buf1 + ("" & out_buf(i)); --- Quote End --- Thanks for the answer, Tricky. I tried and then there are some other errors. Error (10327): VHDL error at mess_extractor.vhd(278): can't determine definition of operator ""&"" -- found 4 possible definitions Error (10647): VHDL type inferencing error at mess_extractor.vhd(278): type of expression is ambiguous - "std_ulogic_vector" or "std_logic_vector" are two possible matches Can you comment on this too? Thanks!