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Altera_Forum's avatar
Altera_Forum
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15 years ago

now able to simulate altpll using vwf file

hi, i am new to this, and trying to simulate altpll with input clock frequency of 27Mhz, however, when i set that input clock of 37037 ps, i am not able to lock it, below is my altpll setting, d...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I'm not an expert in PLL settings but I don't see an initial reset in your simulation.

Did you try an initial reset that last a few clock cycles before the actual simulation?