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When I remove subtraction operation from the formula, everything goes nicely. Hence, it somehow depends on the subtraction operation.
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I can't confirm the observation.
The problem in the original design is created as follows:
Read_Write is an internal self generated signal, that can't be referenced in timing analysis. Thus both the input to Read_Write as well as the Read_Write to output timing can't be analyzed.
Altera timing analysis doesn't recognize, that Read_Write actually violates minimum pulse width and maximum frequency limits and valid design output can't be predicted.
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