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Which embedded OS are you using, if any? Are you using the reduced drivers or the full ones? I know that some versions of the JTAG UART driver will block any writing transaction until a USB blaster is connected (it is the case with the eCos driver, for example, but IIRC the full version from the Altera HAL or with uC OS doesn't have this problem).
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Until now I don't use any OS, only the HAL. Deactivating the UART-JTAG driver solves the problem, now the system starts up after reset (without nios2-terminal).
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As for your problem with the Nios flash programmer, I'm out of ideas. It looks like it doesn't find the SPI master at the expected address. It should fail on the first set of addresses, but should find it 1kbyte after the base address. As an example, here is a read operation done on a board with a Cyclone III and an EPCS64: [...]
Your workflow seems correct to. You could try and run the flash programmer right after you put the .sof flash, without running the embedded software first. Maybe the embedded software screws up the EPCS controller...
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The reading of the EPCS registers somtimes fails at the first register and sometimes at a higher register. Running the flash programmer right after putting the sof file to the fpga does also not work. I don't waste any more time with the flash programmer and use the workflow described by laland.
In any case, using command line tools is more favour to me. I will try to do my builds etc. per command line. Eclipse is uncomfortable slow, but for the first steps it was useful.
I think my Problem is solved and i can program my software to a epcs device.
Much thanks to Daixiwn and laland, you helped me alot!
best regards,
lodentoni
Honored Contributor
