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Altera_Forum
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12 years ago

NIOSII Boot Configuration with EPCS and JTAG-SFL

Hello, i have a problem with configuring and booting my system from an epcs device. The topic is more about the correct design-flow, so i think this should be the right sub-fourm. the test...
Altera_Forum's avatar
Altera_Forum
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12 years ago

Yes, setting the pins as regular I/O should solve your problems.

As for the .jic workflow with an .elf file, AFAIK the only tool that can generate a correct bitstream for an EPCS chip from the .elf file is the command line tool elf2flash (the one called automatically from the Nios Flash Programmer). Unfortunately this tools generates a .srec file, which the Nios flash programmer is quite happy with, but that the Quartus programmer doesn't understand. (why, Altera, why do you make our lives so complicated???). So you need to convert this .srec file to the .hex format to make the Quartus programmer happy. A tool such as srec_cat (http://srecord.sourceforge.net/) can do that directly, or you can do as laland suggests and convert it to a binary format first and then to .hex

If you are using graphical tools from Eclipse I think the easiest workflow is the Nios flash programmer.