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Altera_Forum
Honored Contributor
8 years agonewbie question: synchronous versus combinational bus mux using case statement
Hello all- Can anyone explain why the first (synchronous) version below compiles in quartus, but the second (combinational) does not? In the 2nd case the error is: Error (10137): Verilog ...
Altera_Forum
Honored Contributor
8 years agomake LED a reg in 2nd code.
A reg is not automatically a register, it is just a data type. A wire can only be used in an assign statement. reg types can be used in procedural code.