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jrothlander's avatar
jrothlander
Icon for New Contributor rankNew Contributor
6 years ago
Solved

Newbie: Logic gates are inverted once deployed to board

I'm new to FPGAs and just got Quartus installed and a dev board setup for the first time. For my first test, I setup a schematic with a single two input AND gate. This is my hello world project at...
  • ak6dn's avatar
    ak6dn
    6 years ago

    Many LED driver setups on development boards drive the LED active low, meaning you need to drive the output LOW to turn the LED ON, so a logic 1 is LED OFF, and a logic 0 is LED ON (ie, 'inverted' logic).

    This is done because many (older, for the most part) FPGA outputs can sink a lot more current than they can source for driving a LED. Not so true any more with symmetrical high drive CMOS outputs, or usage of LEDs that are very efficient (ie, only require 2ma to light it up).

    So the bottom line is you have to look at the schematic of your board to see how the LEDs are driven.

SyafieqS's avatar
SyafieqS
Icon for Super Contributor rankSuper Contributor
6 years ago

Hi Jon,


Have you simulate your and gate? Is it behave as expected? Where both input "HIGH" output is "HIGH"?


Thanks,

Regards


  • jrothlander's avatar
    jrothlander
    Icon for New Contributor rankNew Contributor
    6 years ago

    Good point. I have not figure out how to run a simulation yet. I did try to run the simulation, but it fails to start. So I'll focus on getting that worked out.

    Thanks for the suggestion.