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Altera_Forum
Honored Contributor
Honored Contributornewbie in vhdl
good afternoon people. I'm a newbie in vhdl and i have problems about test bench. My area director has left me some problems. If anyone could help me with logs and the last two problems. the li...
Altera_ForumHonored Contributor
Honored ContributorYou cant do what you are trying to do. you're trying to assign the same signal with 3 different bit patterns.
