Forum Discussion
Altera_Forum
Honored Contributor
11 years agoHi Dave,
I know what you mean. I've considered this but I don't want to store the input data inside the FPGA chips. In fact, I need to set the input pins fixed to a series of data, and the size of the input data can sometimes be as large as 1MB, larger than the RAM of some FPGA chips. I've already tried to store these data in an external flash. However the flash will take too many pins from FPGA. That's why I firstly mentioned to edit the .rpd files because I was considering utilizing the EPCS chips which would take less pins. Later, you mentioned JTAG and BIST. This may be a feasible solution because I can store the data in my computer and take no extra pins from the FGPA. As you can see, the original problem is to find a place to store the data and take as little resource(pins & RAM) as possible from the FPGA. That's why my question seems a little convoluted. Best Wishes, Miao